The present invention relates to integrated circuit (IC) packaging and, more particularly, an IC package assembled using a preprinted substrate.
FIG. 1 is a cross-sectional side view of a conventional, quad-flat no-lead (QFN), packaged IC device 100. The IC package 100 includes an IC die 102 mounted on a die pad 112 of a metal lead frame 110 using a suitable die-attach material 104 (e.g., tape or epoxy). The die 102 is connected to leads 114 of the lead frame 110 with bond wires 106. The die 102, bond wires 106, and upper surfaces of the lead frame 110 are encapsulated with a non-conductive molding compound 108. The leads 114 are partially exposed for electrical connection to another device or a printed circuit board. Although the design of the IC package 100 is satisfactory for many applications, it is desirable to design an alternative IC package that is less expensive to assemble, while providing the same functionality as the IC package 100.